A first prior art method for providing isolation of semiconductor devices is shown in FIGS. 1 and 2. As shown therein, after suitable masking, trenches 10 are etched into a silicon body 12. After removal of the masking, oxide 14 is deposited over the resulting structure into the trenches 10 (FIG. 1). Then, the oxide 14 is etched back to achieve a more planar structure, leaving oxide isolation regions 14A. However, because of the unevenness of the upper surface 16 of the deposited oxide 14 (FIG. 1), the top surfaces and side surfaces of silicon in the trenches becomes exposed to and are damaged by undesired contact with the etchant (FIG. 2).
To overcome this problem the following prior art method is described. As shown in FIG. 3, a silicon body 20 is provided, a thin layer 22 of oxide is thermally grown thereover to a thickness of for example 250 .ANG., and a nitride layer 24 is deposited over the oxide layer 22, to a thickness of for example 1500 .ANG.. Then, after appropriate masking, a number of trenches 26, 28, 30 are etched through the nitride layer 24 and oxide layer 22, and into the silicon 20 to a chosen depth (FIG. 4). A thin layer of oxide 32, 34, 36 is then thermally grown in each respective trenches 26, 28, 30 to provide a high quality oxide adjacent the silicon 20, and then a layer of oxide 38 is deposited over the resulting structure, as shown in FIG. 4. It is necessary to grow the thin layer of oxide in each trench prior to the depositing of the oxide layer 38 because the depositing of oxide 38 directly on silicon 20 may lead to undesired charging of the deposited oxide 38, as the electrical characteristics of the deposited oxide 38 are not as good as those of thermal oxide.
It will be understood that the areas of silicon 40, 42, 44, 46 remaining between the trenches will eventually be device active areas.
During the growth of the thin oxide 32, 34, 36, small portions of oxide known as bird's beaks, as at 48, 50, are formed adjacent the top edges of each trench.
In a typical structure, it may well occur that some active areas are relatively close together while others are relatively far apart (see FIG. 4). Thus, when depositing the oxide layer 38 to eventually provide isolation oxide between active areas, while sufficient oxide may be deposited to fill in a trench between closely spaced regions, the deposited oxide 38 is spread out and thinned to a point where it may not completely fill the trench between the widely spaced active areas as at 44, 46. Then even after a mechanical chemical polishing step, a non-planar device may well result. To avoid this problem, a rather large amount of oxide 38' may need to be deposited to insure that a trench between widely spaced active areas is properly filled. This results in a highly nonplanar device as shown at FIG. 5.
In the past, in dealing with this problem, an etching step was undertaken using "reverse" photoresist masks 52, 54, 56 (FIG. 5) for blocking off those areas wherein it was undesirable to etch away material in an attempt to gain a generally more planar device. During a subsequent etching step, oxide is removed from the exposed areas of the oxide layer 38' areas, to achieve a more planar device (FIG. 6), so that further etching, after removal of the masks 52, 54, 56, leads to more a planar device prior to polishing (FIG. 7). This of course results in an additional mask and etch step which adds to manufacturing inefficiency.
Furthermore, upon removal of the nitride and oxide layers 22, 24 to reach what will be the active areas 40, 42, 44, 46 of the silicon 20, a portion of the oxide in each respective trench 26, 28, 30 remains so as to protrude above the rest of the structure (FIG. 8), again resulting in a non-planar device.